Pass the ARM AAE EN0-001 Questions and answers with ExamsMirror

Which one of the following statements is TRUE for monitor mode debugging?

Which of these processors is only available as a single core configuration?

In a Cortex-A9 MPCore cluster with four processors, which of the processors can be interrupted by a software-generated interrupt?

In a hardware system that runs software providing secure systems, which of the following describes the behavior of external memory and peripherals?

When programming in C, how many bytes of stack are needed to pass parameters when calling the following function?

int foo( int arg_a, int arg_b, int arg_c )

In a loop termination test, how might a programmer indicate to the compiler that the loop iteration count limit is divisible by four?

What type of debug point would you set when debugging flash memory or ROM?

An ARM Cortex-A9 multi-core system has two CPUs, C1 and C2, each with a corresponding data cache. The code running on C1 writes to a memory location M. and C1 updates its data cache, but not main memory. After that, C2 tries to read the contents of memory location M. Which of the following hardware can automatically (without software inteivention) ensure that C2 reads the updated contents of M?

The Performance Monitoring Unit (PMU) of a Cortex-A9 processor permits direct measurement of which one of the following?

It is common to declare structures as "packed" in order to minimize data memory size. Which of the following accurately describes the effect of this?